A team of researchers at the Department of Electrical Engineering, University of Engineering and Technology (UET), Lahore, has designed a System on Chip (SoC) integrating a processor core with multiple peripherals for embedded applications.
According to a press release issued by UET, the designed SoC (UETRV_ESoC) consists of a 3-stage pipelined RISC-V processor core, three motor control modules, each capable of controlling dc-servo motors for coordinated multi-axis motion control, along with a few other peripherals.
UETRV-ESOC has also been selected for the fabrication in the Open Source MPW-5 Shuttle program which is sponsored by Google.
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The researchers’ team, comprising Umer Shahid, Abdul Wadood, Ali Imran, Junaid Amjad, and Professor Dr Muhammad Tahir, has successfully accomplished the goal and aspire to make many more such contributions to the open-source community in the future.
The team is thankful to its alumni and acknowledges their support in equipping Digital System Design Laboratory with necessary resources.
Vice-Chancellor UET Dr Syed Mansoor Sarwar has congratulated all researchers and other stakeholders for the success of this project.
“We have already established a laboratory for IC design and testing at the UET through funding from Punjab Government and plan to enhance our expertise and offer a graduate degree program in this area,” said Dr Sarwar.
He added that this success will motivate further research and development efforts in the domain of digital IC/SoC design in Pakistan.
